Conventional computer systems utilize a von Neumann organization in which a single instruction stream is applied to a single processor to operate on a single data stream. In such systems, the performance is closely coupled to the performance of the single processor. In parallel systems, on the other hand, an array of processors operates in parallel on multiple data streams. Performance of the system can be increased as a function of the number of processors in the array as well as the performance of individual processors.
Parallel architectures generally fall into two categories: single instruction, multiple data (SIMD) and multiple instruction, multiple data (MIMD). In SIMD systems, a single instruction stream is broadcast to all processors of the array, and all processors simultaneously perform the same operations but on different sets of data. In MIMD systems, each processor is provided with its own instruction set so that different instructions can be applied to different sets of data in parallel.
One form of MIMD relies on message-driven processors. One form of message-driven processor in such a processor array was presented by William Dally in "A VLSI Architecture for Concurrent Data Structures," PhD Thesis, Department of Computer Science, California Institute of Technology, Technical Report 5209: TR 86, 1986 and in A VLSI Architecture for Concurrent Data Structures, 1987. In that system, messages are transferred between processors of the array to drive the individual processors. Within each processor, the messages are buffered in a queue. Once the message is transferred from the queue to a receive buffer, it is interpreted to look up a method specified by a selector and class in the message. Sequential messages identify sequential methods for processing. Each processor need not retain a complete set of methods. Rather, as methods are referenced, they can be copied over the network.